Power Modeling and Capping for Heterogeneous ARM/FPGA SoCs
Published in Proceedings of the 2014 International Conference on Field-Programmable Technology (FPT), IEEE, pp. 231–234, 2014
This paper addresses the challenge of power management in heterogeneous ARM/FPGA System-on-Chip (SoC) architectures. The authors propose a methodology for power modeling and capping, aiming to optimize energy efficiency in embedded systems. The approach is validated through experimental results, demonstrating its effectiveness in real-world applications.
Key contributions include:
Power Modeling: Development of a power modeling technique tailored for ARM/FPGA SoCs, enabling accurate estimation of power consumption.
Power Capping: Introduction of a power capping mechanism to limit power usage, ensuring energy efficiency without compromising performance.
Experimental Validation: Validation of the proposed methodology through experiments, showcasing its applicability in embedded systems.
Recommended citation: Wu, Y., Nunez-Yanez, J., Woods, R., & Nikolopoulos, D. S. (2014). Power Modeling and Capping for Heterogeneous ARM/FPGA SoCs. In *Proceedings of the 2014 International Conference on Field-Programmable Technology (FPT)* (pp. 231–234). IEEE. https://doi.org/10.1109/FPT.2014.7082782
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